How is an enhancement MOSFET built, and how does a gate voltage create a conducting channel?

In one line

An enhancement n-channel MOSFET has \( n^+ \) source and drain regions in a p-type substrate and a metal gate insulated by a thin oxide layer; a positive gate voltage above the threshold attracts electrons to form an n-channel between source and drain.

Explained simply

Picture two islands (source and drain) separated by a strip of sea (the p-type substrate). There is no bridge, so nothing flows. Apply a positive voltage on the gate, which sits above the strip like a magnet separated by a thin glass sheet, and it pulls a layer of electrons up to the surface: a bridge appears. A larger voltage makes a wider bridge and more current.

Technically, MOSFET stands for Metal-Oxide-Semiconductor FET. The gate is insulated from the channel by silicon dioxide (\( \text{SiO}_2 \)), so the input resistance is extremely high and gate current is practically zero. In the enhancement type no channel exists at \( V_{GS} = 0 \); in the depletion type a channel is built in and the gate voltage can either reduce or enhance it.

How it works

1. At \( V_{GS} = 0 \): two back-to-back p-n junctions between source and drain, so \( I_D \approx 0 \). The device is normally OFF.
2. Small positive \( V_{GS} \): holes under the gate are pushed away, leaving a depletion layer.
3. \( V_{GS} > V_T \) (threshold voltage, typically 1–4 V for power devices): enough electrons gather at the surface to form an inversion layer, an n-type channel.
4. With \( V_{DS} \) applied, electrons flow from source to drain. Higher \( V_{GS} \) gives a thicker channel and more \( I_D \).
5. As \( V_{DS} \) rises, the channel pinches off near the drain and \( I_D \) saturates, similar to a JFET.
6. Gate oxide is very thin and can be damaged by static charge, so MOSFETs are handled with care.

Key formula

In saturation: \( I_D = k(V_{GS} - V_T)^2 \), valid for \( V_{GS} > V_T \)

\( I_D \) = drain current (A), \( k \) = device constant (A/V²), \( V_{GS} \) = gate-source voltage (V), \( V_T \) = threshold voltage (V).

Quick example

Every modern processor contains billions of MOSFETs used as switches in CMOS logic (n-channel and p-channel pairs). Power MOSFETs switch the current in phone chargers, inverters and BLDC motor controllers.

Common mistakes

• Saying a MOSFET gate forms a p-n junction with the channel; it is insulated by oxide.
• Saying an enhancement MOSFET conducts at \( V_{GS} = 0 \).
• Confusing the threshold voltage \( V_T \) with the pinch-off voltage of a JFET.

How MU asks it

Numericals are not expected in this module (MU syllabus), so questions are theory with diagrams. Typical: "Explain the construction and working of an n-channel enhancement MOSFET" (5 marks) or "Differentiate between JFET and MOSFET". For full marks draw the cross-section (p-substrate, \( n^+ \) source and drain, \( \text{SiO}_2 \), metal gate, induced channel), draw the symbol, sketch drain and transfer characteristics with \( V_T \) marked, and explain inversion step by step.