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Field Effect Transistor (FET): a three-terminal, unipolar (only majority carriers), voltage-controlled semiconductor device in which the current through a channel is controlled by the electric field produced by the gate voltage. Terminals: Source (S), Drain (D), Gate (G).

Types: JFET (n-channel, p-channel) and MOSFET (depletion and enhancement type, n- and p-channel).

 n-channel JFET:      D
                      |
            p+ |######|###| p+      Symbol:     D
    G ---------|  n-channel |--------         G -|>|  (arrow into channel)
               |######|###|                     |
                      |                          S
                      S

Working (n-channel JFET): a bar of n-type silicon forms the channel between S and D, with p+ gate regions on both sides. With VGS = 0 and VDS applied, electrons flow from S to D. The gate–channel junction is reverse biased (VGS negative). Increasing reverse bias widens the depletion layers, narrows the channel and reduces ID. At VGS = VP (pinch-off voltage) the channel closes and ID ≈ 0. Transfer characteristic (Shockley's equation): \( I_D = I_{DSS}\left(1-\dfrac{V_{GS}}{V_P}\right)^2 \).

Drain characteristics: ohmic region (ID rises linearly with VDS), pinch-off/saturation region (ID nearly constant), breakdown region.

Features / advantages: very high input impedance, low noise, better thermal stability, no offset voltage, small size. Applications: buffer amplifiers, RF amplifiers, analog switches/choppers, voltage-variable resistor, digital ICs (MOSFET/CMOS).

Doubtly AI · 25 Oct 2026 AI-verified · Oct 2026 Report
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